diff options
| author | Martin Roth <gaumless@gmail.com> | 2017-10-15 15:06:48 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-01-15 23:25:12 +0000 |
| commit | 264566c177dac98e67c2a4765fe08c5d8de10753 (patch) | |
| tree | 34cfe5ba3958d14dd976bd7f2a2fb58a3920c74d /src/southbridge/intel/i3100/ioapic.c | |
| parent | f6af8943e23b8ffa27df6ddb8e4a654387be0cb6 (diff) | |
Intel i3100 boards & chips: Remove - using LATE_CBMEM_INIT
All boards and chips that are still using LATE_CBMEM_INIT are being
removed as previously discussed.
If these boards and chips are updated to not use LATE_CBMEM_INIT, they
can be restored to the active codebase from the 4.7 branch.
chips:
northbridge/intel/i3100
southbridge/intel/i3100
superio/intel/i3100
cpu/intel/socket_mPGA479M
Mainboards:
mainboard/intel/truxton
mainboard/intel/mtarvon
mainboard/intel/truxton
Change-Id: Ic2bbdc8ceb3ba0359c120cf4286b0c5b7dc653bb
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/22031
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/southbridge/intel/i3100/ioapic.c')
| -rw-r--r-- | src/southbridge/intel/i3100/ioapic.c | 56 |
1 files changed, 0 insertions, 56 deletions
diff --git a/src/southbridge/intel/i3100/ioapic.c b/src/southbridge/intel/i3100/ioapic.c deleted file mode 100644 index a324e7d3f4..0000000000 --- a/src/southbridge/intel/i3100/ioapic.c +++ /dev/null @@ -1,56 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2011 Sven Schnelle <svens@stackframe.org> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include <console/console.h> -#include <device/device.h> -#include <device/pci.h> -#include <device/pci_ids.h> -#include <device/pci_ops.h> -#include "i3100.h" - - -static void read_resources(struct device *dev) -{ - u32 tmp; - - /* Enable IO(X)APIC config space */ - tmp = pci_read_config16(dev, 0x40); - pci_write_config16(dev, 0x40, tmp & ~(1 << 13)); - /* Enable I/O APIC space at 0xfec80000 */ - dev->path.pci.devfn |= 1; - pci_write_config16(dev, 0x04, 0x06); - pci_write_config32(dev, 0x10, 0xfec80000); - dev->path.pci.devfn &= ~1; - pci_write_config16(dev, 0x40, tmp); - - pci_bus_read_resources(dev); -} - -static struct device_operations pci_ops = { - .read_resources = read_resources, - .set_resources = pci_dev_set_resources, - .enable_resources = pci_bus_enable_resources, - .scan_bus = pci_scan_bridge, - .reset_bus = pci_bus_reset, - .ops_pci = 0, - -}; - -static const struct pci_driver pci_driver0 __pci_driver = { - .ops = &pci_ops, - .vendor = PCI_VENDOR_ID_INTEL, - .device = 0x3500, -}; |