diff options
author | Ed Swierk <eswierk@arastra.com> | 2008-03-16 23:34:10 +0000 |
---|---|---|
committer | Stefan Reinauer <stepan@openbios.org> | 2008-03-16 23:34:10 +0000 |
commit | aaea11b749ccd481a37424c38625873c231f850d (patch) | |
tree | dee6e79b648a2916002d20b1f31af6bf32ad1524 /src/southbridge/intel/i3100/i3100_early_smbus.c | |
parent | 62eee3ff4fc544ede21d72fcb5a1859b3f571dc8 (diff) |
Here is an updated patch addressing most of Uwe's and Peter's
comments. Ripping out the ehci/uhci_init() code doesn't seem to have
done any harm, and I got rid of a bunch of unused junk in
i3100_smbus.h
I left the *_set_subsystem() arguments unsigned, as that's how the
function is declared in include/device/pci.h.
Signed-off-by: Ed Swierk <eswierk@arastra.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3157 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel/i3100/i3100_early_smbus.c')
-rw-r--r-- | src/southbridge/intel/i3100/i3100_early_smbus.c | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/src/southbridge/intel/i3100/i3100_early_smbus.c b/src/southbridge/intel/i3100/i3100_early_smbus.c new file mode 100644 index 0000000000..3e31864c22 --- /dev/null +++ b/src/southbridge/intel/i3100/i3100_early_smbus.c @@ -0,0 +1,47 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2008 Arastra, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * + */ + +#include "i3100_smbus.h" + +#define SMBUS_IO_BASE 0x0f00 + +static void enable_smbus(void) +{ + device_t dev; + dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_INTEL, + PCI_DEVICE_ID_INTEL_3100_SMB), 0); + if (dev == PCI_DEV_INVALID) { + die("SMBus controller not found\r\n"); + } + print_spew("SMBus controller enabled\r\n"); + pci_write_config32(dev, 0x20, SMBUS_IO_BASE | 1); + pci_write_config8(dev, 0x40, 1); + pci_write_config8(dev, 0x4, 1); + /* SMBALERT_DIS */ + outb(4, SMBUS_IO_BASE + SMBSLVCMD); + + /* Disable interrupt generation */ + outb(0, SMBUS_IO_BASE + SMBHSTCTL); +} + +static int smbus_read_byte(u32 device, u32 address) +{ + return do_smbus_read_byte(SMBUS_IO_BASE, device, address); +} |