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authorKyösti Mälkki <kyosti.malkki@gmail.com>2018-06-21 16:20:55 +0300
committerFelix Held <felix-coreboot@felixheld.de>2019-01-06 13:09:54 +0000
commite7377556cc33b10fdba6d956ac83d823478f5eb4 (patch)
tree8843182316aed1730edb12aa0fbc18de4d3be414 /src/southbridge/intel/fsp_rangeley
parentc70eed1e6202c928803f3e7f79161cd247a62b23 (diff)
device: Use pcidev_path_on_root()
Change-Id: I2e28b9f4ecaf258bff8a062b5a54cb3d8e2bb9b0 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/30400 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/southbridge/intel/fsp_rangeley')
-rw-r--r--src/southbridge/intel/fsp_rangeley/acpi.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/fsp_rangeley/acpi.c b/src/southbridge/intel/fsp_rangeley/acpi.c
index fbdc6e320b..96ddea5be6 100644
--- a/src/southbridge/intel/fsp_rangeley/acpi.c
+++ b/src/southbridge/intel/fsp_rangeley/acpi.c
@@ -34,7 +34,7 @@ typedef struct southbridge_intel_fsp_rangeley_config config_t;
void acpi_fill_in_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
{
acpi_header_t *header = &(fadt->header);
- struct device *lpcdev = dev_find_slot(0, SOC_LPC_DEVFN);
+ struct device *lpcdev = pcidev_path_on_root(SOC_LPC_DEVFN);
u16 pmbase = pci_read_config16(lpcdev, ABASE) & 0xfff0;
config_t *config = lpcdev->chip_info;