diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-03-02 18:00:29 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-03-04 15:08:03 +0000 |
| commit | 065857ee7fd61b05025d7a803e82f2b9b53cbc9a (patch) | |
| tree | 3016bedfeac37b6aca649f1474f6343228ae9673 /src/southbridge/intel/fsp_rangeley | |
| parent | bdaec07a859c0c05e7fd5276a15b3933da574368 (diff) | |
arch/io.h: Drop unnecessary include
Change-Id: I91158452680586ac676ea11c8589062880a31f91
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/31692
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/fsp_rangeley')
| -rw-r--r-- | src/southbridge/intel/fsp_rangeley/early_spi.c | 1 | ||||
| -rw-r--r-- | src/southbridge/intel/fsp_rangeley/early_usb.c | 1 | ||||
| -rw-r--r-- | src/southbridge/intel/fsp_rangeley/smbus.c | 1 |
3 files changed, 0 insertions, 3 deletions
diff --git a/src/southbridge/intel/fsp_rangeley/early_spi.c b/src/southbridge/intel/fsp_rangeley/early_spi.c index 3c4f2d7ee5..7b20cdb9a7 100644 --- a/src/southbridge/intel/fsp_rangeley/early_spi.c +++ b/src/southbridge/intel/fsp_rangeley/early_spi.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <arch/io.h> #include <console/console.h> #include <device/pci_def.h> #include <delay.h> diff --git a/src/southbridge/intel/fsp_rangeley/early_usb.c b/src/southbridge/intel/fsp_rangeley/early_usb.c index 896ef64bad..0b10ef6e05 100644 --- a/src/southbridge/intel/fsp_rangeley/early_usb.c +++ b/src/southbridge/intel/fsp_rangeley/early_usb.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <arch/io.h> #include <device/pci_ops.h> #include <device/pci_def.h> #include "soc.h" diff --git a/src/southbridge/intel/fsp_rangeley/smbus.c b/src/southbridge/intel/fsp_rangeley/smbus.c index 907f39270d..90b0420465 100644 --- a/src/southbridge/intel/fsp_rangeley/smbus.c +++ b/src/southbridge/intel/fsp_rangeley/smbus.c @@ -20,7 +20,6 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> -#include <arch/io.h> #include <southbridge/intel/common/smbus.h> #include "soc.h" |