diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2018-05-22 02:18:00 +0300 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2019-01-06 01:17:54 +0000 |
commit | c70eed1e6202c928803f3e7f79161cd247a62b23 (patch) | |
tree | e46a6c87f6f13b7719fd40a9360d8d03359bfffb /src/southbridge/intel/fsp_rangeley/soc.c | |
parent | 54efaae701dacd58621e66a8cf56812eb5304946 (diff) |
device: Use pcidev_on_root()
Change-Id: Icf34b39d80f6e46d32a39b68f38fb2752c0bcebc
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/26484
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Piotr Król <piotr.krol@3mdeb.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/southbridge/intel/fsp_rangeley/soc.c')
-rw-r--r-- | src/southbridge/intel/fsp_rangeley/soc.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/intel/fsp_rangeley/soc.c b/src/southbridge/intel/fsp_rangeley/soc.c index 13b64c4e7f..fd83342ac7 100644 --- a/src/southbridge/intel/fsp_rangeley/soc.c +++ b/src/southbridge/intel/fsp_rangeley/soc.c @@ -29,7 +29,7 @@ int soc_silicon_revision(void) { if (soc_revision_id < 0) soc_revision_id = pci_read_config8( - dev_find_slot(0, PCI_DEVFN(0x1f, 0)), + pcidev_on_root(0x1f, 0), PCI_REVISION_ID); return soc_revision_id; } @@ -38,7 +38,7 @@ int soc_silicon_type(void) { if (soc_type < 0) soc_type = pci_read_config8( - dev_find_slot(0, PCI_DEVFN(0x1f, 0)), + pcidev_on_root(0x1f, 0), PCI_DEVICE_ID + 1); return soc_type; } |