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authorMartin Roth <martinroth@google.com>2015-10-11 10:36:26 +0200
committerMartin Roth <martinroth@google.com>2015-10-14 22:49:03 +0000
commit58562405c8c416a415652516b8af31b204b4ff0d (patch)
tree3311f3f5feceea80a048337f0485fc9c956ee5ac /src/southbridge/intel/fsp_rangeley/romstage.h
parent83e4c5613eecc5283d9a66997dc90e26384f9284 (diff)
Revert "Remove FSP Rangeley SOC and mohonpeak board support"
This chip is still being used and should not have been deleted. It's a current intel chip, and doesn't even require an ME binary. This reverts commit 959478a763c16688d43752adbae2c76e7764da45. Change-Id: I78594871f87af6e882a245077b59727e15f8021a Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: http://review.coreboot.org/11860 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc@marcjonesconsulting.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/fsp_rangeley/romstage.h')
-rw-r--r--src/southbridge/intel/fsp_rangeley/romstage.h39
1 files changed, 39 insertions, 0 deletions
diff --git a/src/southbridge/intel/fsp_rangeley/romstage.h b/src/southbridge/intel/fsp_rangeley/romstage.h
new file mode 100644
index 0000000000..f3b7242d06
--- /dev/null
+++ b/src/southbridge/intel/fsp_rangeley/romstage.h
@@ -0,0 +1,39 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2013 Google Inc.
+ * Copyright (C) 2014 Sage Electronic Engineering, LLC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
+#ifndef _RANGELEY_ROMSTAGE_H_
+#define _RANGELEY_ROMSTAGE_H_
+
+#if !defined(__PRE_RAM__)
+#error "Don't include romstage.h from a ramstage compilation unit!"
+#endif
+
+#include <stdint.h>
+#include <arch/cpu.h>
+#include <drivers/intel/fsp1_0/fsp_util.h>
+
+void main(FSP_INFO_HEADER *fsp_info_header);
+void early_mainboard_romstage_entry(void);
+void late_mainboard_romstage_entry(void);
+void get_func_disables(uint32_t *mask);
+
+void romstage_main_continue(EFI_STATUS status, void *hob_list_ptr);
+
+#endif /* _RANGELEY_ROMSTAGE_H_ */