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| author | Arthur Heymans <arthur@aheymans.xyz> | 2018-06-03 11:02:54 +0200 |
|---|---|---|
| committer | Arthur Heymans <arthur@aheymans.xyz> | 2018-06-05 07:48:46 +0000 |
| commit | 3aa9adba675b894fc7a1db41f9aea98eafeff88b (patch) | |
| tree | b8fa5fcd0984ca29b052c228d8eaf43bb84d4d99 /src/southbridge/intel/fsp_i89xx | |
| parent | 7a8205ba353fdf7063791926f82f84c7a9491c35 (diff) | |
cpu/intel/car/core2: Improve a few things
This changes the following:
- compute amount variable MTRR's during runtime
- Wait for all CPU's to be in Wait for SIPI state after sending init
INIT IPI to all AP's
- compute the PHYSMASK high during runtime and preload it to the
MTRR_PHYS_MASK msr's
Change-Id: I8d8672f8b577c2e7cef6e80978c4464a771f430c
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/26784
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/southbridge/intel/fsp_i89xx')
0 files changed, 0 insertions, 0 deletions