diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-05-15 16:59:06 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2018-05-24 17:35:16 +0000 |
| commit | ac350f82cd4dfab20a6fb49e5dea536ae448e054 (patch) | |
| tree | 7b1890b9c173639d4c3be18a551ae4fcb11308d7 /src/southbridge/intel/fsp_i89xx/me_8.x.c | |
| parent | 688d004c4f8d94089c637be3a53ebdbb48493e97 (diff) | |
sb/intel/fsp_i89xx: Get rid of device_t
Use of device_t is discouraged unless necessary.
Change-Id: I89f9fe94c1e3e5c2b183572d7f603d016d0f0e1c
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26249
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/southbridge/intel/fsp_i89xx/me_8.x.c')
| -rw-r--r-- | src/southbridge/intel/fsp_i89xx/me_8.x.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/southbridge/intel/fsp_i89xx/me_8.x.c b/src/southbridge/intel/fsp_i89xx/me_8.x.c index b77cad2aad..aec6cd68ec 100644 --- a/src/southbridge/intel/fsp_i89xx/me_8.x.c +++ b/src/southbridge/intel/fsp_i89xx/me_8.x.c @@ -115,7 +115,7 @@ static inline void mei_write_dword_ptr(void *ptr, int offset) } #ifndef __SMM__ -static inline void pci_read_dword_ptr(device_t dev, void *ptr, int offset) +static inline void pci_read_dword_ptr(struct device *dev, void *ptr, int offset) { u32 dword = pci_read_config32(dev, offset); memcpy(ptr, &dword, sizeof(dword)); @@ -490,7 +490,7 @@ void intel_me8_finalize_smm(void) #else /* !__SMM__ */ /* Determine the path that we should take based on ME status */ -static me_bios_path intel_me_path(device_t dev) +static me_bios_path intel_me_path(struct device *dev) { me_bios_path path = ME_DISABLE_BIOS_PATH; struct me_hfs hfs; @@ -564,7 +564,7 @@ static me_bios_path intel_me_path(device_t dev) } /* Prepare ME for MEI messages */ -static int intel_mei_setup(device_t dev) +static int intel_mei_setup(struct device *dev) { struct resource *res; struct mei_csr host; @@ -594,7 +594,7 @@ static int intel_mei_setup(device_t dev) } /* Read the Extend register hash of ME firmware */ -static int intel_me_extend_valid(device_t dev) +static int intel_me_extend_valid(struct device *dev) { struct me_heres status; u32 extend[8] = {0}; @@ -641,14 +641,14 @@ static int intel_me_extend_valid(device_t dev) } /* Hide the ME virtual PCI devices */ -static void intel_me_hide(device_t dev) +static void intel_me_hide(struct device *dev) { dev->enabled = 0; pch_enable(dev); } /* Check whether ME is present and do basic init */ -static void intel_me_init(device_t dev) +static void intel_me_init(struct device *dev) { me_bios_path path = intel_me_path(dev); me_bios_payload mbp_data; @@ -692,7 +692,7 @@ static void intel_me_init(device_t dev) } } -static void set_subsystem(device_t dev, unsigned vendor, unsigned device) +static void set_subsystem(struct device *dev, unsigned vendor, unsigned device) { if (!vendor || !device) { pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, |