diff options
| author | Jacob Garber <jgarber1@ualberta.ca> | 2019-04-03 09:18:32 -0600 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-04-07 02:43:26 +0000 |
| commit | 7eb8eed460ccc8d2b9d7ad87bf165c12e894eaba (patch) | |
| tree | 06e3f34d31b767fa076dc0d9ec1eb9f6b7c27c27 /src/southbridge/intel/common | |
| parent | d2cdfff63b6e2376fad729252a57acfd2b4418ea (diff) | |
sb/intel/{common,i82801dx}: Improve TCO debug code
Report unhandled TCO bits (previously dead code). This
finishes the work done in 3e3b858 (sb/intel/ibexpeak:
Update debug code to match other chips).
Found-by: Coverity Scan, CID 1229598 (DEADCODE)
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Change-Id: I65df8f3363c62b364e096368a36ba5e9e8894c13
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32179
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/common')
| -rw-r--r-- | src/southbridge/intel/common/smihandler.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/common/smihandler.c b/src/southbridge/intel/common/smihandler.c index b2cf49a45e..8a16aaaddd 100644 --- a/src/southbridge/intel/common/smihandler.c +++ b/src/southbridge/intel/common/smihandler.c @@ -418,7 +418,7 @@ static void southbridge_smi_tco(void) } else if (tco_sts & (1 << 3)) { /* TIMEOUT */ /* Handle TCO timeout */ printk(BIOS_DEBUG, "TCO Timeout.\n"); - } else if (!tco_sts) { + } else { dump_tco_status(tco_sts); } } |