diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2018-05-22 02:18:00 +0300 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2019-01-06 01:17:54 +0000 |
| commit | c70eed1e6202c928803f3e7f79161cd247a62b23 (patch) | |
| tree | e46a6c87f6f13b7719fd40a9360d8d03359bfffb /src/southbridge/intel/common | |
| parent | 54efaae701dacd58621e66a8cf56812eb5304946 (diff) | |
device: Use pcidev_on_root()
Change-Id: Icf34b39d80f6e46d32a39b68f38fb2752c0bcebc
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/26484
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Piotr Król <piotr.krol@3mdeb.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/southbridge/intel/common')
| -rw-r--r-- | src/southbridge/intel/common/acpi_pirq_gen.c | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/common/gpio.c | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/common/pmbase.c | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/common/rtc.c | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/common/spi.c | 2 |
5 files changed, 5 insertions, 5 deletions
diff --git a/src/southbridge/intel/common/acpi_pirq_gen.c b/src/southbridge/intel/common/acpi_pirq_gen.c index 1f1a2ab258..6f28bc693f 100644 --- a/src/southbridge/intel/common/acpi_pirq_gen.c +++ b/src/southbridge/intel/common/acpi_pirq_gen.c @@ -32,7 +32,7 @@ static int create_pirq_matrix(char matrix[32][4]) struct device *dev; int num_devs = 0; - for (dev = dev_find_slot(0, PCI_DEVFN(0, 0)); dev; dev = dev->sibling) { + for (dev = pcidev_on_root(0, 0); dev; dev = dev->sibling) { u8 pci_dev; u8 int_pin; diff --git a/src/southbridge/intel/common/gpio.c b/src/southbridge/intel/common/gpio.c index 7c8cfe8144..30c50283f6 100644 --- a/src/southbridge/intel/common/gpio.c +++ b/src/southbridge/intel/common/gpio.c @@ -31,7 +31,7 @@ #if defined(__SIMPLE_DEVICE__) #define PCH_LPC_DEV PCI_DEV(0, 0x1f, 0) #else -#define PCH_LPC_DEV dev_find_slot(0, PCI_DEVFN(0x1f, 0)) +#define PCH_LPC_DEV pcidev_on_root(0x1f, 0) #endif static u16 get_gpio_base(void) diff --git a/src/southbridge/intel/common/pmbase.c b/src/southbridge/intel/common/pmbase.c index 2de57d6da4..8b3274f524 100644 --- a/src/southbridge/intel/common/pmbase.c +++ b/src/southbridge/intel/common/pmbase.c @@ -33,7 +33,7 @@ #if defined(__SIMPLE_DEVICE__) #define PCH_LPC_DEV PCI_DEV(0, 0x1f, 0) #else -#define PCH_LPC_DEV dev_find_slot(0, PCI_DEVFN(0x1f, 0)) +#define PCH_LPC_DEV pcidev_on_root(0x1f, 0) #endif u16 lpc_get_pmbase(void) diff --git a/src/southbridge/intel/common/rtc.c b/src/southbridge/intel/common/rtc.c index e9ac2c2deb..1f0abeb450 100644 --- a/src/southbridge/intel/common/rtc.c +++ b/src/southbridge/intel/common/rtc.c @@ -27,7 +27,7 @@ #if defined(__SIMPLE_DEVICE__) #define PCH_LPC_DEV PCI_DEV(0, 0x1f, 0) #else -#define PCH_LPC_DEV dev_find_slot(0, PCI_DEVFN(0x1f, 0)) +#define PCH_LPC_DEV pcidev_on_root(0x1f, 0) #endif int rtc_failure(void) diff --git a/src/southbridge/intel/common/spi.c b/src/southbridge/intel/common/spi.c index 3ca0d6c8d6..9bc34140a9 100644 --- a/src/southbridge/intel/common/spi.c +++ b/src/southbridge/intel/common/spi.c @@ -306,7 +306,7 @@ void spi_init(void) #ifdef __SIMPLE_DEVICE__ pci_devfn_t dev = PCI_DEV(0, 31, 0); #else - struct device *dev = dev_find_slot(0, PCI_DEVFN(31, 0)); + struct device *dev = pcidev_on_root(31, 0); #endif pci_read_config_dword(dev, 0xf0, &rcba); |