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authorAngel Pons <th3fanbus@gmail.com>2021-04-19 13:15:28 +0200
committerPatrick Georgi <pgeorgi@google.com>2021-04-21 09:00:18 +0000
commit62719a379776efdde3439f053363170133fd8e69 (patch)
treec091d47e9b9cc26a2b7ee19bfffebb728e7253d9 /src/southbridge/intel/common
parent5daa412939bfb35cec7a876d68860fe0f4bb9515 (diff)
{sb,soc}/intel: Use `get_int_option` function
Change-Id: I05f724785880089a513319d70dfd70fc2a6b7679 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47109 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/southbridge/intel/common')
-rw-r--r--src/southbridge/intel/common/smihandler.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/src/southbridge/intel/common/smihandler.c b/src/southbridge/intel/common/smihandler.c
index 733c625f6c..db034fc245 100644
--- a/src/southbridge/intel/common/smihandler.c
+++ b/src/southbridge/intel/common/smihandler.c
@@ -95,13 +95,12 @@ __weak void southbridge_smm_xhci_sleep(u8 slp_type)
static int power_on_after_fail(void)
{
- u8 s5pwr = CONFIG_MAINBOARD_POWER_FAILURE_STATE;
-
/* save and recover RTC port values */
u8 tmp70, tmp72;
tmp70 = inb(0x70);
tmp72 = inb(0x72);
- get_option(&s5pwr, "power_on_after_fail");
+ const int s5pwr = get_int_option("power_on_after_fail",
+ CONFIG_MAINBOARD_POWER_FAILURE_STATE);
outb(tmp70, 0x70);
outb(tmp72, 0x72);