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authorArthur Heymans <arthur@aheymans.xyz>2019-06-04 13:57:47 +0200
committerNico Huber <nico.h@gmx.de>2019-10-30 21:39:12 +0000
commitb8bda114874c8a1122460bbe5b50f3aa757c5a76 (patch)
tree3bea096a9149282249d86045a84b6b604eede802 /src/southbridge/intel/common
parent63998adf4acb92e9a43533f9f82cafb28f295ac4 (diff)
sb/intel/common: Make linking pmbase.c conditional
Change-Id: I6a7cd96699dbeb42a53bf1d25db1bcf93e416e0f Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33200 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/common')
-rw-r--r--src/southbridge/intel/common/Kconfig7
-rw-r--r--src/southbridge/intel/common/Makefile.inc4
2 files changed, 9 insertions, 2 deletions
diff --git a/src/southbridge/intel/common/Kconfig b/src/southbridge/intel/common/Kconfig
index 31039b68b4..c5aaa80f8c 100644
--- a/src/southbridge/intel/common/Kconfig
+++ b/src/southbridge/intel/common/Kconfig
@@ -9,6 +9,11 @@ config SOUTHBRIDGE_INTEL_COMMON_RESET
config SOUTHBRIDGE_INTEL_COMMON_PMCLIB
def_bool n
depends on SOUTHBRIDGE_INTEL_COMMON
+ depends on SOUTHBRIDGE_INTEL_COMMON_PMBASE
+
+config SOUTHBRIDGE_INTEL_COMMON_PMBASE
+ def_bool n
+ depends on SOUTHBRIDGE_INTEL_COMMON
config SOUTHBRIDGE_INTEL_COMMON_GPIO
def_bool n
@@ -36,6 +41,7 @@ config SOUTHBRIDGE_INTEL_COMMON_SMM
def_bool n
select HAVE_POWER_STATE_AFTER_FAILURE
select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE
+ select SOUTHBRIDGE_INTEL_COMMON_PMBASE
config SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT
bool
@@ -78,6 +84,7 @@ config INTEL_CHIPSET_LOCKDOWN
config SOUTHBRIDGE_INTEL_COMMON_WATCHDOG
bool
depends on SOUTHBRIDGE_INTEL_COMMON
+ depends on SOUTHBRIDGE_INTEL_COMMON_PMBASE
if SOUTHBRIDGE_INTEL_COMMON_FINALIZE
diff --git a/src/southbridge/intel/common/Makefile.inc b/src/southbridge/intel/common/Makefile.inc
index e5a5a0c5b1..5ca7daf8a5 100644
--- a/src/southbridge/intel/common/Makefile.inc
+++ b/src/southbridge/intel/common/Makefile.inc
@@ -27,8 +27,8 @@ ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG) += watchdog.c
ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_COMMON),y)
-all-y += pmbase.c
-smm-y += pmbase.c
+all-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE) += pmbase.c
+smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE) += pmbase.c
bootblock-$(CONFIG_USBDEBUG) += usb_debug.c
romstage-$(CONFIG_USBDEBUG) += usb_debug.c