diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-06-29 05:57:12 +0300 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2021-01-04 23:15:46 +0000 |
commit | 8c2cc68b1ac9e1fb2011bcb669df04b4c8cad351 (patch) | |
tree | d58be6725fbfc4c15034a630afdb8262e2fca84e /src/southbridge/intel/common | |
parent | c5a3a4a602f938dbc6e2e63c96522e0b74b6c814 (diff) |
arch/x86: Pass GNVS as parameter to SMM module
Change-Id: I9d7417462830443f9c96273d2cc326cbcc3b17dd
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48698
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/common')
-rw-r--r-- | src/southbridge/intel/common/pmutil.h | 3 | ||||
-rw-r--r-- | src/southbridge/intel/common/smihandler.c | 12 |
2 files changed, 1 insertions, 14 deletions
diff --git a/src/southbridge/intel/common/pmutil.h b/src/southbridge/intel/common/pmutil.h index c1756474ae..c9cf544f4e 100644 --- a/src/southbridge/intel/common/pmutil.h +++ b/src/southbridge/intel/common/pmutil.h @@ -4,7 +4,6 @@ #define INTEL_COMMON_PMUTIL_H #include <cpu/x86/smm.h> -#include <cpu/intel/em64t101_save_state.h> #define D31F0_PMBASE 0x40 #define D31F0_GEN_PMCON_1 0xa0 @@ -129,10 +128,8 @@ void dump_all_status(void); void southbridge_smm_xhci_sleep(u8 slp_type); void gpi_route_interrupt(u8 gpi, u8 mode); void southbridge_gate_memory_reset(void); -void southbridge_update_gnvs(u8 apm_cnt, int *smm_done); void southbridge_finalize_all(void); void southbridge_smi_monitor(void); -em64t101_smm_state_save_area_t *smi_apmc_find_state_save(u8 cmd); void pch_log_state(void); #endif /*INTEL_COMMON_PMUTIL_H */ diff --git a/src/southbridge/intel/common/smihandler.c b/src/southbridge/intel/common/smihandler.c index 7610aa1102..d59e29cdd9 100644 --- a/src/southbridge/intel/common/smihandler.c +++ b/src/southbridge/intel/common/smihandler.c @@ -17,8 +17,6 @@ #include "pmutil.h" -static int smm_initialized = 0; - u16 get_pmbase(void) { return lpc_get_pmbase(); @@ -198,7 +196,7 @@ static void southbridge_smi_sleep(void) * core in case we are not running on the same core that * initiated the IO transaction. */ -em64t101_smm_state_save_area_t *smi_apmc_find_state_save(u8 cmd) +static em64t101_smm_state_save_area_t *smi_apmc_find_state_save(u8 cmd) { em64t101_smm_state_save_area_t *state; int node; @@ -302,14 +300,6 @@ static void southbridge_smi_apmc(void) write_pmbase32(PM1_CNT, read_pmbase32(PM1_CNT) | SCI_EN); printk(BIOS_DEBUG, "SMI#: ACPI enabled.\n"); break; - case APM_CNT_GNVS_UPDATE: - if (smm_initialized) { - printk(BIOS_DEBUG, - "SMI#: SMM structures already initialized!\n"); - return; - } - southbridge_update_gnvs(reg8, &smm_initialized); - break; case APM_CNT_FINALIZE: if (mainboard_finalized) { printk(BIOS_DEBUG, "SMI#: Already finalized\n"); |