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author | Aaron Durbin <adurbin@chromium.org> | 2017-02-07 11:33:56 -0600 |
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committer | Aaron Durbin <adurbin@chromium.org> | 2017-02-08 15:12:31 +0100 |
commit | 7d14af815492d7d886244086ad24dde3d9805381 (patch) | |
tree | adc7ec129d126ce3e440dfe48a962a2c9ea5fe4c /src/southbridge/intel/common | |
parent | 96a4317fa9543a0d07e34bae3d40da810554411f (diff) |
soc/intel/apollolake: dump CSE status
Dump the CSE status registers for potential debugging purposes.
Explicitly call out manufacturing mode of the part since it's
important shipping devices ensure manufacturing mode is locked
down. Intel is planning on writing a common driver so a complete
status -> string dumps was not done because (surprise surprise)
not all the fields are equal with previous implementations.
BUG=chrome-os-partner:62177
BRANCH=reef
TEST=Booted and noted dump of CSE status registers.
Change-Id: I71d15722bb193877f1569c1d3e7f441302f5bd14
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/18303
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/southbridge/intel/common')
0 files changed, 0 insertions, 0 deletions