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authorFurquan Shaikh <furquan@google.com>2020-05-02 10:24:23 -0700
committerFurquan Shaikh <furquan@google.com>2020-05-02 18:45:16 +0000
commit76cedd2c292352d7dbd45fab70ec272e476d0910 (patch)
tree21fa0e33a2324e2ab93f38a90f6efd1a49ecdd76 /src/southbridge/intel/common
parente0844636aca974449c7257e846ec816db683d0b9 (diff)
acpi: Move ACPI table support out of arch/x86 (3/5)
This change moves all ACPI table support in coreboot currently living under arch/x86 into common code to make it architecture independent. ACPI table generation is not really tied to any architecture and hence it makes sense to move this to its own directory. In order to make it easier to review, this change is being split into multiple CLs. This is change 3/5 which basically is generated by running the following command: $ git grep -iIl "arch/acpi" | xargs sed -i 's/arch\/acpi/acpi\/acpi/g' BUG=b:155428745 Change-Id: I16b1c45d954d6440fb9db1d3710063a47b582eae Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40938 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Diffstat (limited to 'src/southbridge/intel/common')
-rw-r--r--src/southbridge/intel/common/acpi_pirq_gen.c2
-rw-r--r--src/southbridge/intel/common/madt.c2
-rw-r--r--src/southbridge/intel/common/pciehp.c4
-rw-r--r--src/southbridge/intel/common/pmbase.c2
-rw-r--r--src/southbridge/intel/common/pmclib.c2
-rw-r--r--src/southbridge/intel/common/smihandler.c2
6 files changed, 7 insertions, 7 deletions
diff --git a/src/southbridge/intel/common/acpi_pirq_gen.c b/src/southbridge/intel/common/acpi_pirq_gen.c
index 20dafdfd38..d1a00f4498 100644
--- a/src/southbridge/intel/common/acpi_pirq_gen.c
+++ b/src/southbridge/intel/common/acpi_pirq_gen.c
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
-#include <arch/acpigen.h>
+#include <acpi/acpigen.h>
#include <console/console.h>
#include <device/pci_def.h>
#include <device/pci_ops.h>
diff --git a/src/southbridge/intel/common/madt.c b/src/southbridge/intel/common/madt.c
index d425a74366..fe65afaea2 100644
--- a/src/southbridge/intel/common/madt.c
+++ b/src/southbridge/intel/common/madt.c
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <arch/ioapic.h>
#include <arch/smp/mpspec.h>
diff --git a/src/southbridge/intel/common/pciehp.c b/src/southbridge/intel/common/pciehp.c
index e5bbdab2fb..4f77bb0086 100644
--- a/src/southbridge/intel/common/pciehp.c
+++ b/src/southbridge/intel/common/pciehp.c
@@ -2,8 +2,8 @@
/* This file is part of the coreboot project. */
#include <string.h>
-#include <arch/acpi.h>
-#include <arch/acpigen.h>
+#include <acpi/acpi.h>
+#include <acpi/acpigen.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/southbridge/intel/common/pmbase.c b/src/southbridge/intel/common/pmbase.c
index 6175302d54..d78e9cd2e8 100644
--- a/src/southbridge/intel/common/pmbase.c
+++ b/src/southbridge/intel/common/pmbase.c
@@ -2,7 +2,7 @@
/* This file is part of the coreboot project. */
#include <stdint.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <arch/io.h>
#include <bootmode.h>
#include <device/pci_ops.h>
diff --git a/src/southbridge/intel/common/pmclib.c b/src/southbridge/intel/common/pmclib.c
index d44d6195ce..72df0ff86a 100644
--- a/src/southbridge/intel/common/pmclib.c
+++ b/src/southbridge/intel/common/pmclib.c
@@ -2,7 +2,7 @@
/* This file is part of the coreboot project. */
#include <stdint.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <console/console.h>
#include "pmclib.h"
diff --git a/src/southbridge/intel/common/smihandler.c b/src/southbridge/intel/common/smihandler.c
index 7b27ce0cd5..3e3dca94f8 100644
--- a/src/southbridge/intel/common/smihandler.c
+++ b/src/southbridge/intel/common/smihandler.c
@@ -4,7 +4,7 @@
#include <types.h>
#include <arch/io.h>
#include <device/pci_ops.h>
-#include <arch/acpi.h>
+#include <acpi/acpi.h>
#include <console/console.h>
#include <cpu/x86/cache.h>
#include <device/pci_def.h>