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authorAngel Pons <th3fanbus@gmail.com>2020-10-25 13:35:36 +0100
committerAngel Pons <th3fanbus@gmail.com>2020-11-04 22:07:50 +0000
commit2ac4cc65955833fc48d44302cef26b6fd17341c2 (patch)
tree7a311c90a7d1f01a69ce2a0d9ce52bcb6c28589c /src/southbridge/intel/common
parentf1e81e6eb969cde5a48c69dcb44365c77b9b8419 (diff)
sb/intel/common/acpi/pcie.asl: Generalise file comment
This file is no longer specific to 6 and 7 series PCHs. Change-Id: Ib89378bd6ba1d80281b92a79d37b9fdeaaed40fb Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46762 Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/common')
-rw-r--r--src/southbridge/intel/common/acpi/pcie.asl4
1 files changed, 1 insertions, 3 deletions
diff --git a/src/southbridge/intel/common/acpi/pcie.asl b/src/southbridge/intel/common/acpi/pcie.asl
index 8f496d38d8..c1bfcfda27 100644
--- a/src/southbridge/intel/common/acpi/pcie.asl
+++ b/src/southbridge/intel/common/acpi/pcie.asl
@@ -1,8 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* Intel 6/7 Series PCH PCIe support */
-
-// PCI Express Ports
+/* Intel southbridge PCIe support */
Method (IRQM, 1, Serialized) {