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authorElyes HAOUAS <ehaouas@noos.fr>2020-09-15 08:42:17 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-10-26 06:44:40 +0000
commit92f46aaac7104c62ab3956dc32af5ccbddc944f1 (patch)
tree39fc9cab1ca29fb2fcf6f5ae136384f56e23dff5 /src/southbridge/intel/common
parentf209b18df3b66d78a9838787182d40fc72eee010 (diff)
src: Include <arch/io.h> when appropriate
Change-Id: I4077b9dfeeb2a9126c35bbdd3d14c52e55a5e87c Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45404 Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/common')
-rw-r--r--src/southbridge/intel/common/finalize.c1
-rw-r--r--src/southbridge/intel/common/smi.c1
2 files changed, 0 insertions, 2 deletions
diff --git a/src/southbridge/intel/common/finalize.c b/src/southbridge/intel/common/finalize.c
index 59d429747c..975d839e67 100644
--- a/src/southbridge/intel/common/finalize.c
+++ b/src/southbridge/intel/common/finalize.c
@@ -1,6 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-#include <arch/io.h>
#include <console/console.h>
#include <device/pci_ops.h>
#include <southbridge/intel/common/pmbase.h>
diff --git a/src/southbridge/intel/common/smi.c b/src/southbridge/intel/common/smi.c
index 0dbc48cea5..20926e579e 100644
--- a/src/southbridge/intel/common/smi.c
+++ b/src/southbridge/intel/common/smi.c
@@ -3,7 +3,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <console/console.h>
-#include <arch/io.h>
#include <cpu/x86/smm.h>
#include <cpu/intel/smm_reloc.h>
#include <southbridge/intel/common/pmbase.h>