diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-08-19 21:40:21 +0200 |
|---|---|---|
| committer | Michael Niewöhner <foss@mniewoehner.de> | 2020-09-21 16:29:35 +0000 |
| commit | 131d9f5190a1e5b6fd5a47fecbe5f7eef002c0ef (patch) | |
| tree | accfc86126dba3bf22fe731689ee791894a3bcaa /src/southbridge/intel/common | |
| parent | b69bbfe1ef52421f0bbe1e632d99dc264660ee02 (diff) | |
src/southbridge: Drop unneeded empty lines
Change-Id: I02aa1e2a9a9061b34b91f832d96123a8595d61b7
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44592
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src/southbridge/intel/common')
| -rw-r--r-- | src/southbridge/intel/common/pmutil.c | 3 | ||||
| -rw-r--r-- | src/southbridge/intel/common/pmutil.h | 1 | ||||
| -rw-r--r-- | src/southbridge/intel/common/smi.c | 1 | ||||
| -rw-r--r-- | src/southbridge/intel/common/smihandler.c | 3 | ||||
| -rw-r--r-- | src/southbridge/intel/common/spi.c | 1 |
5 files changed, 0 insertions, 9 deletions
diff --git a/src/southbridge/intel/common/pmutil.c b/src/southbridge/intel/common/pmutil.c index d8196f8c72..02a8375e9a 100644 --- a/src/southbridge/intel/common/pmutil.c +++ b/src/southbridge/intel/common/pmutil.c @@ -94,7 +94,6 @@ void dump_smi_status(u32 smi_sts) printk(BIOS_DEBUG, "\n"); } - /** * @brief read and clear GPE0_STS * @return GPE0_STS register @@ -158,7 +157,6 @@ u32 reset_tco_status(void) return reg32; } - void dump_tco_status(u32 tco_sts) { printk(BIOS_DEBUG, "TCO_STS: "); @@ -190,7 +188,6 @@ void smi_set_eos(void) write_pmbase8(SMI_EN, reg8); } - void dump_alt_gp_smi_status(u16 alt_gp_smi_sts) { int i; diff --git a/src/southbridge/intel/common/pmutil.h b/src/southbridge/intel/common/pmutil.h index 52b83dd264..c1756474ae 100644 --- a/src/southbridge/intel/common/pmutil.h +++ b/src/southbridge/intel/common/pmutil.h @@ -27,7 +27,6 @@ #define GPI_IS_SCI 0x02 #define GPI_IS_NMI 0x03 - #define MAINBOARD_POWER_OFF 0 #define MAINBOARD_POWER_ON 1 #define MAINBOARD_POWER_KEEP 2 diff --git a/src/southbridge/intel/common/smi.c b/src/southbridge/intel/common/smi.c index 06d7c74e58..0dbc48cea5 100644 --- a/src/southbridge/intel/common/smi.c +++ b/src/southbridge/intel/common/smi.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ - #include <device/device.h> #include <device/pci.h> #include <console/console.h> diff --git a/src/southbridge/intel/common/smihandler.c b/src/southbridge/intel/common/smihandler.c index 49e306f667..7610aa1102 100644 --- a/src/southbridge/intel/common/smihandler.c +++ b/src/southbridge/intel/common/smihandler.c @@ -95,7 +95,6 @@ __weak void southbridge_smm_xhci_sleep(u8 slp_type) { } - static void southbridge_smi_sleep(void) { u8 reg8; @@ -388,8 +387,6 @@ static void southbridge_smi_mc(void) printk(BIOS_DEBUG, "Microcontroller SMI.\n"); } - - static void southbridge_smi_tco(void) { u32 tco_sts; diff --git a/src/southbridge/intel/common/spi.c b/src/southbridge/intel/common/spi.c index 380940c739..757f0acc48 100644 --- a/src/southbridge/intel/common/spi.c +++ b/src/southbridge/intel/common/spi.c @@ -718,7 +718,6 @@ static int ich_hwseq_wait_for_cycle_complete(unsigned int timeout, return 0; } - static int ich_hwseq_erase(const struct spi_flash *flash, u32 offset, size_t len) { |