diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2019-05-01 16:56:36 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-05-07 16:01:35 +0000 |
| commit | 551a75923ec7e7bacaf6da79b38eda5c3b3821ad (patch) | |
| tree | 32d10123e44a9e7e8c699e532b2c8fe8f2ac781c /src/southbridge/intel/common/tco.h | |
| parent | 30bc9f415d9564de90fc0c6c6a92462ce3ce7c06 (diff) | |
sb/{ICH7,NM10,PCH}: Use common watchdog_off function
Change-Id: I704780b6ae7238560dcb72fc027addc1089e0674
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32533
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: David Guckian
Diffstat (limited to 'src/southbridge/intel/common/tco.h')
| -rw-r--r-- | src/southbridge/intel/common/tco.h | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/src/southbridge/intel/common/tco.h b/src/southbridge/intel/common/tco.h new file mode 100644 index 0000000000..9d6f15326e --- /dev/null +++ b/src/southbridge/intel/common/tco.h @@ -0,0 +1,27 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (c) 2019 Elyes Haouas <ehaouas@noos.fr> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef SOUTHBRIDGE_INTEL_COMMON_TCO_H +#define SOUTHBRIDGE_INTEL_COMMON_TCO_H + +#define PMBASE_TCO_OFFSET 0x60 +#define TCO1_STS 0x04 +#define TCO1_TIMEOUT (1 << 3) +#define TCO2_STS 0x06 +#define SECOND_TO_STS (1 << 1) +#define TCO1_CNT 0x08 +#define TCO_TMR_HLT (1 << 11) + +#endif /* SOUTHBRIDGE_INTEL_COMMON_TCO_H */ |