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authorArthur Heymans <arthur@aheymans.xyz>2018-06-03 12:37:54 +0200
committerArthur Heymans <arthur@aheymans.xyz>2018-06-05 07:59:22 +0000
commit88af0f38eb19f956e8df2b62254c10c7603a9a33 (patch)
tree97fdbf21a0dca3c0f6c5473e9bf92c0b954df33a /src/southbridge/intel/common/smi.c
parent02b13fd8cdfbfcb4858ec0e6f66688b96950198e (diff)
cpu/intel/haswell: Switch to POSTCAR_STAGE
Tested on Google Peppy (Acer C720). Change-Id: I1802547d7a5b3875689cc4e126e7c189a75defa9 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/26793 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/common/smi.c')
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