diff options
author | Arthur Heymans <arthur@aheymans.xyz> | 2018-04-11 13:03:34 +0200 |
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committer | Arthur Heymans <arthur@aheymans.xyz> | 2018-04-11 11:49:05 +0000 |
commit | 68f688896ce347f7304748b655332354dc1da778 (patch) | |
tree | aad6838527a06637a78268cd3d09f9b00609b68f /src/southbridge/intel/common/smi.c | |
parent | 5fbe788bae15f0d24d56011e8eb8b48c107b7b05 (diff) |
Revert "model_206ax: Use parallel MP init"
This reverts commit 5fbe788bae15f0d24d56011e8eb8b48c107b7b05.
This commit was submitted without its parent being submitted,
resulting in coreboot not building.
Change-Id: I87497093ccf6909b88e3a40d5f472afeb7f2c552
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/25616
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/southbridge/intel/common/smi.c')
-rw-r--r-- | src/southbridge/intel/common/smi.c | 26 |
1 files changed, 0 insertions, 26 deletions
diff --git a/src/southbridge/intel/common/smi.c b/src/southbridge/intel/common/smi.c index 264b5487d8..deaecb2625 100644 --- a/src/southbridge/intel/common/smi.c +++ b/src/southbridge/intel/common/smi.c @@ -159,29 +159,3 @@ void smm_setup_structures(void *gnvs, void *tcg, void *smi1) "d" (APM_CNT) ); } - -void southbridge_smm_clear_state(void) -{ - u32 smi_en; - - if (IS_ENABLED(CONFIG_ELOG)) - /* Log events from chipset before clearing */ - pch_log_state(); - - printk(BIOS_DEBUG, "Initializing Southbridge SMI..."); - printk(BIOS_SPEW, " ... pmbase = 0x%04x\n", get_pmbase()); - - smi_en = inl(get_pmbase() + SMI_EN); - if (smi_en & APMC_EN) { - printk(BIOS_INFO, "SMI# handler already enabled?\n"); - return; - } - - printk(BIOS_DEBUG, "\n"); - - /* Dump and clear status registers */ - reset_smi_status(); - reset_pm1_status(); - reset_tco_status(); - reset_gpe0_status(); -} |