diff options
| author | Frans Hendriks <fhendriks@eltan.com> | 2018-12-12 08:13:30 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-04-23 10:07:38 +0000 |
| commit | 0556f6132b28ff8da45a5a1b4ef4c66e95b5bcb9 (patch) | |
| tree | ca2d8a846367bf72394644a7f7e237db7727a5f1 /src/southbridge/intel/common/reset.c | |
| parent | 34564ed154b6734cc51bf05d61b45d9a74cdc2b5 (diff) | |
soc/intel/braswell/acpi/lpss.asl: Remove SPI1 and PWM asl code
Linux remains using SPI1 and PWM ASL even if these devices are disabled.
SPI1 and PWM are disabled by Intel FSP.
Remove ASL code.
BUG=N/A
TEST=Boot Ubuntu on Intel CherryHill CRB
Change-Id: Iec2ca7520081d00bf7a53d58ee054aa6f23e5606
Signed-off-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/29417
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Diffstat (limited to 'src/southbridge/intel/common/reset.c')
0 files changed, 0 insertions, 0 deletions