aboutsummaryrefslogtreecommitdiff
path: root/src/southbridge/intel/common/rcba.h
diff options
context:
space:
mode:
authorPeter Lemenkov <lemenkov@gmail.com>2019-01-10 12:19:01 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-01-14 11:57:25 +0000
commit522a1b526b31c66aed2d75e99dd810dc5a136bbf (patch)
treefd30402b5c542428059d75b0f1f3355d0124d417 /src/southbridge/intel/common/rcba.h
parente23245517bed9befc41bbc8c571e05782a95d5fe (diff)
mb/lenovo/[xtz]60: Introduce and use RCBA64 macro
Change-Id: I85ca631dfb01acb92dd1ac38dff07215114cab8c Signed-off-by: Peter Lemenkov <lemenkov@gmail.com> Reviewed-on: https://review.coreboot.org/c/30802 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/southbridge/intel/common/rcba.h')
-rw-r--r--src/southbridge/intel/common/rcba.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/southbridge/intel/common/rcba.h b/src/southbridge/intel/common/rcba.h
index e7482f9bdb..225cd26086 100644
--- a/src/southbridge/intel/common/rcba.h
+++ b/src/southbridge/intel/common/rcba.h
@@ -28,6 +28,7 @@
#define RCBA8(x) (*((volatile u8 *)(DEFAULT_RCBA + x)))
#define RCBA16(x) (*((volatile u16 *)(DEFAULT_RCBA + x)))
#define RCBA32(x) (*((volatile u32 *)(DEFAULT_RCBA + x)))
+#define RCBA64(x) (*((volatile u64 *)(DEFAULT_RCBA + x)))
#define RCBA_AND_OR(bits, x, and, or) \
(RCBA##bits(x) = ((RCBA##bits(x) & (and)) | (or)))