diff options
| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2018-03-28 19:48:42 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-04-06 06:43:43 +0000 |
| commit | d85c4afea56b3ca0eca4de3707884802bbdcca45 (patch) | |
| tree | 543df0e77bc5c8457a352601996d187052fcec55 /src/southbridge/intel/common/pciehp.c | |
| parent | 3f42a26b421555dae88bbeae46b7de8835d4e2bd (diff) | |
amd/stoneyridge: Use defined value for SPI flash MTRR
Replace an absolute value with a #define value in bootblock. This is
in preparation for using an additional MTRR in a subsequent patch.
Change-Id: I006c7cfa0057b3ed4a21359fc8367caf6ec5baf3
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/25455
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Diffstat (limited to 'src/southbridge/intel/common/pciehp.c')
0 files changed, 0 insertions, 0 deletions