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authorFelix Held <felix-coreboot@felixheld.de>2023-11-18 17:49:48 +0100
committerFelix Held <felix-coreboot@felixheld.de>2023-12-06 16:19:01 +0000
commit898757fc44e73654c8c093a754356820ea42a355 (patch)
tree1ca68cf7b274ff465523d3b9796388f49803b504 /src/southbridge/intel/common/gpio.c
parent1bb327f2162d4ce736a632ef817e48622ae9dbc1 (diff)
sb/intel/bd82x6x: assign PCH PCI bridge ops in chipset devicetree
Since the PCI bridge in the PCH is always on the same device function, the device operations can be statically assigned in the devicetree and there's no need to bind the PCI bridge device operations to the PCI device during runtime via a list of PCI IDs. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ic9ca925a12e64c9a5b3bf295653bf032572ff29a Reviewed-on: https://review.coreboot.org/c/coreboot/+/79169 Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/southbridge/intel/common/gpio.c')
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