sb/intel/common/pirq_gen: Rework generating pin-route tables

This creates a pin-route matrix first and then generates the ACPI
entries based on that. This approach has the advantage of being
simpler (no need for checks on double entries) and requiring less
access to the pci config space.

A few thing that are also fixed:
* Don't declare DEFAULT_RCBA redundantly.
* Only loop over PCI devices on bus 0
* Add a license header to rcba_pirq.c
* Remove inappropriate use of typedefs
* Fix the pin field: needs to be a byte
* Fix the source field: it should either be a byte or a path
(according to Advanced Configuration and Power Interface Specification
rev 2.0c)

Change-Id: Ic68a91d0cb55942a4d928b30f73e1c779142420d
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/22979
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 7 insertions, 6 deletions

diff --git a/src/southbridge/intel/common/acpi_pirq_gen.h b/src/southbridge/intel/common/acpi_pirq_gen.h
index bd702da80d..9fdee1a45b 100644
--- a/src/southbridge/intel/common/acpi_pirq_gen.h
+++ b/src/southbridge/intel/common/acpi_pirq_gen.h
@@ -16,15 +16,15 @@
 #ifndef INTEL_COMMON_ACPI_PIRQ_GEN_H
 #define INTEL_COMMON_ACPI_PIRQ_GEN_H
 
-typedef enum pci_pin {
+enum pci_pin {
 	PCI_INT_NONE = 0,
 	PCI_INT_A,
 	PCI_INT_B,
 	PCI_INT_C,
 	PCI_INT_D,
-} pci_pin_t;
+};
 
-typedef enum pirq {
+enum pirq {
 	PIRQ_NONE = 0,
 	PIRQ_A,
 	PIRQ_B,
@@ -34,9 +34,10 @@ typedef enum pirq {
 	PIRQ_F,
 	PIRQ_G,
 	PIRQ_H,
-} pirq_t;
+};
 
-void intel_acpi_gen_def_acpi_pirq(device_t dev);
-enum pirq intel_common_map_pirq(const device_t dev, const pci_pin_t pci_pin);
+void intel_acpi_gen_def_acpi_pirq(struct device *dev);
+enum pirq intel_common_map_pirq(const struct device *dev,
+				const enum pci_pin pci_pin);
 
 #endif