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authorArthur Heymans <arthur@aheymans.xyz>2017-09-25 12:21:07 +0200
committerArthur Heymans <arthur@aheymans.xyz>2017-12-10 14:50:08 +0000
commitbddef0dae73676c44364cd9d53813144ce42198a (patch)
tree5f50270d1b42f2461eb323b1928a3b4f661bc5bd /src/southbridge/intel/common/Makefile.inc
parentbf8db8d45b35181c84a163ab669f7a8d39ad5fec (diff)
sb/intel/common: Add SOUTHBRIDGE_INTEL_COMMON_SPI
This introduces a Kconfig option to include common Intel SPI code. Change-Id: I970408e5656c0e8812b8609e2cc10d0bc8d8f6f2 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/21674 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/southbridge/intel/common/Makefile.inc')
-rw-r--r--src/southbridge/intel/common/Makefile.inc5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/southbridge/intel/common/Makefile.inc b/src/southbridge/intel/common/Makefile.inc
index 5810394bcb..0128505d66 100644
--- a/src/southbridge/intel/common/Makefile.inc
+++ b/src/southbridge/intel/common/Makefile.inc
@@ -28,4 +28,9 @@ smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO) += gpio.c
romstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS) += smbus.c
ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS) += smbus.c
+ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI) += spi.c
+ifeq ($(CONFIG_SPI_FLASH_SMM),y)
+smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI) += spi.c
+endif
+
endif