diff options
author | Gabe Black <gabeblack@google.com> | 2014-04-30 17:12:25 -0700 |
---|---|---|
committer | Marc Jones <marc.jones@se-eng.com> | 2014-10-22 03:55:14 +0200 |
commit | b3f08c61f15970ef3d9e197b02d6dedb8b2c5830 (patch) | |
tree | 155ff03fa576a914cde2d74deb93bf50358d5482 /src/southbridge/intel/bd82x6x | |
parent | 6dbc680a90353a5ac5553ca5686af6220f61191e (diff) |
cmos: Rename the CMOS related functions.
Most of the code related to the mc146818 is not related to the RTC and is
really for managing the CMOS storage. Since we intend to add a generic API
for RTC drivers it's inconvenient for those functions to have an rtc_ prefix.
This CL renames those functions so they start with cmos_ instead. There are
some places where rtc_init was called with a comment that says something about
starting the RTC. That wasn't correct before (the RTC is always running), but
it looks a little odd now that the function is called cmos_init.
This CL also opportunistically cleans up some style problems in this file.
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://chromium-review.googlesource.com/197794
Reviewed-by: Gabe Black <gabeblack@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
(cherry picked from commit 9a9ad24888b185fb58965457704e326bb508d788)
Removed the addition of stdint.h to mc146818rtc.h since
types.h is now included. Changed rtc_init to cmos_init for
fsp_bd82x6x, fsp_rangeley, fsp_baytrail, ibexpeak, vortex86ex.
Change-Id: Id4b9f6bea93e8bd5eaef2cb17f296adb9697114c
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6977
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge/intel/bd82x6x')
-rw-r--r-- | src/southbridge/intel/bd82x6x/lpc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index 75b8a6c91e..0e3a4f6466 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -294,7 +294,7 @@ static void pch_rtc_init(struct device *dev) } printk(BIOS_DEBUG, "rtc_failed = 0x%x\n", rtc_failed); - rtc_init(rtc_failed); + cmos_init(rtc_failed); } /* CougarPoint PCH Power Management init */ |