diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2021-12-28 13:05:56 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-01-04 11:48:19 +0000 |
| commit | af4bd5633debc8838b563c3fadd96e2b4b060ab5 (patch) | |
| tree | 6867d466f6e3b7ca8e6077979a404caf7609a747 /src/southbridge/intel/bd82x6x | |
| parent | 0b9d186e3dc7c209d0fc26b61db3cd98550b71bd (diff) | |
sb/intel: Use `bool` for PCIe coalescing option
Retype the `pcie_port_coalesce` devicetree options and related variables
to better reflect their bivalue (boolean) nature.
Change-Id: I6a4dfe277a8f83a9eb58515fc4eaa2fee0747ddb
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60416
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/bd82x6x')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/chip.h | 4 | ||||
| -rw-r--r-- | src/southbridge/intel/bd82x6x/pch.c | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/src/southbridge/intel/bd82x6x/chip.h b/src/southbridge/intel/bd82x6x/chip.h index 797c93f3aa..30c2675513 100644 --- a/src/southbridge/intel/bd82x6x/chip.h +++ b/src/southbridge/intel/bd82x6x/chip.h @@ -4,7 +4,7 @@ #define SOUTHBRIDGE_INTEL_BD82X6X_CHIP_H #include <southbridge/intel/common/spi.h> -#include <stdint.h> +#include <types.h> struct southbridge_intel_bd82x6x_config { /** @@ -58,7 +58,7 @@ struct southbridge_intel_bd82x6x_config { uint32_t gen4_dec; /* Enable linear PCIe Root Port function numbers starting at zero */ - uint8_t pcie_port_coalesce; + bool pcie_port_coalesce; /* Override PCIe ASPM */ uint8_t pcie_aspm[8]; diff --git a/src/southbridge/intel/bd82x6x/pch.c b/src/southbridge/intel/bd82x6x/pch.c index 82b95f69e4..d24604c513 100644 --- a/src/southbridge/intel/bd82x6x/pch.c +++ b/src/southbridge/intel/bd82x6x/pch.c @@ -319,7 +319,7 @@ static void pch_pcie_enable(struct device *dev) * or the other devices will not be enumerated by the OS. */ if (!dev->enabled) - config->pcie_port_coalesce = 1; + config->pcie_port_coalesce = true; if (config->pcie_port_coalesce) printk(BIOS_INFO, |