diff options
| author | Nico Huber <nico.huber@secunet.com> | 2018-03-01 13:28:02 +0100 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2018-03-02 17:21:06 +0000 |
| commit | 8aaa00401b68e5c5b6c07b0984e3e7c3027e3c2f (patch) | |
| tree | e51b3679273a9c4472e337d51f51ccba8fa613d1 /src/southbridge/intel/bd82x6x | |
| parent | 60320182d011a8c31793f833f36f65cd5e8b50df (diff) | |
sb/intel/common: Fix conflicting OIC register definition
Commit d2d2aef6a3 (sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a
common location) makes some platforms use the wrong OIC register defi-
nition. It was extended to 16-bit in the corporate version of ICH10.
So let's give the new size and location a new name: EOIC (extended OIC).
This only touches the systems affected by the mentioned change. Other
platforms still need to be adapted before they can use the common RCBA
definitions.
Change-Id: If9e554c072f01412164dc35e0b09272142e3796f
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/24924
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Bill XIE <persmule@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/southbridge/intel/bd82x6x')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/early_rcba.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/intel/bd82x6x/early_rcba.c b/src/southbridge/intel/bd82x6x/early_rcba.c index 990ff0d874..9ce9dc9d41 100644 --- a/src/southbridge/intel/bd82x6x/early_rcba.c +++ b/src/southbridge/intel/bd82x6x/early_rcba.c @@ -60,9 +60,9 @@ southbridge_configure_default_intmap(void) DIR_ROUTE(D22IR, PIRQA, PIRQB, PIRQC, PIRQD); /* Enable IOAPIC (generic) */ - RCBA16(OIC) = 0x0100; + RCBA16(EOIC) = 0x0100; /* PCH BWG says to read back the IOAPIC enable register */ - (void) RCBA16(OIC); + (void) RCBA16(EOIC); } void |