diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2019-02-28 13:04:29 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-03-01 10:02:29 +0000 |
| commit | 0d4de2a4771f2b88062dc4d14e9ddd4f00650741 (patch) | |
| tree | 1e02005f0457270a1b8b156df5a90f8ef6536c9d /src/southbridge/intel/bd82x6x | |
| parent | c3d03b3197dd5c582c18bcf7b9ececde130d07b3 (diff) | |
ACPI: Rename FADT model and set it to zero
INT_MODEL defined in ACPI 1.0 and renamed to reserved since V 2.0.
The value for this field is zero but 1 is allowed to maintain
compatibility with ACPI 1.0.
So set this value to zero as we are using greater version than ACPI 1.0.
Change-Id: I910ead4e5618c958a7989f4c309a3a4bb938e31a
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/29986
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: David Guckian
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/bd82x6x')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/lpc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index 4de4f1664c..de6b78c9cb 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -745,7 +745,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) u16 pmbase = pci_read_config16(dev, 0x40) & 0xfffe; int c2_latency; - fadt->model = 1; + fadt->reserved = 0; fadt->sci_int = 0x9; fadt->smi_cmd = APM_CNT; |