diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2013-07-26 08:53:59 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-12-06 20:43:17 +0100 |
| commit | b4a45dcf9d442b311dec7396a55be917713a0d15 (patch) | |
| tree | 4b287fac6d041096a3709d3707533ac52cfca78e /src/southbridge/intel/bd82x6x | |
| parent | d45114ff59284cebc0c03821cc4d7782ca3bacf8 (diff) | |
intel PCI ops: Remove explicit PCI MMCONF access
MMCONF was explicitly used here to avoid races of 0xcf8/0xcfc access
being non-atomic and/or need to access 4kiB of PCI config space.
All these platforms now have MMCONF_SUPPORT_DEFAULT.
Change-Id: If62537475eb67b7ecf85f2292a2a954a41bc18d1
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/17545
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/southbridge/intel/bd82x6x')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/me.c | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/bd82x6x/me_8.x.c | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/bd82x6x/smihandler.c | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/src/southbridge/intel/bd82x6x/me.c b/src/southbridge/intel/bd82x6x/me.c index 23915c3a80..0e5187c08f 100644 --- a/src/southbridge/intel/bd82x6x/me.c +++ b/src/southbridge/intel/bd82x6x/me.c @@ -33,7 +33,7 @@ #include <halt.h> #ifdef __SMM__ -#include <arch/pci_mmio_cfg.h> +#include <arch/io.h> #else # include <device/device.h> # include <device/pci.h> diff --git a/src/southbridge/intel/bd82x6x/me_8.x.c b/src/southbridge/intel/bd82x6x/me_8.x.c index 220a176739..94cec3e701 100644 --- a/src/southbridge/intel/bd82x6x/me_8.x.c +++ b/src/southbridge/intel/bd82x6x/me_8.x.c @@ -33,7 +33,7 @@ #include <halt.h> #ifdef __SMM__ -#include <arch/pci_mmio_cfg.h> +#include <arch/io.h> #else # include <device/device.h> # include <device/pci.h> diff --git a/src/southbridge/intel/bd82x6x/smihandler.c b/src/southbridge/intel/bd82x6x/smihandler.c index 71ebb6e0e6..4cef988ef1 100644 --- a/src/southbridge/intel/bd82x6x/smihandler.c +++ b/src/southbridge/intel/bd82x6x/smihandler.c @@ -28,7 +28,7 @@ #include "nvs.h" #include <northbridge/intel/sandybridge/sandybridge.h> -#include <arch/pci_mmio_cfg.h> +#include <arch/io.h> #include <southbridge/intel/bd82x6x/me.h> #include <southbridge/intel/common/gpio.h> #include <cpu/intel/model_206ax/model_206ax.h> |