diff options
| author | Patrick Georgi <patrick@georgi-clan.de> | 2012-10-05 21:54:38 +0200 |
|---|---|---|
| committer | Patrick Georgi <patrick@georgi-clan.de> | 2012-10-08 21:23:08 +0200 |
| commit | 9aeb69447d3839675b2cac51c3e95a4724fd9b0d (patch) | |
| tree | d9b1cc7483a51ab340d6d9fae78a30e562f99767 /src/southbridge/intel/bd82x6x | |
| parent | ec2c18ee6068ef6adf6f5be437d7047c91773654 (diff) | |
hpet: common ACPI generation
HPET's min ticks (minimum time between events to avoid
losing interrupts) is chipset specific, so move it to
Kconfig.
Via also has a special base address, so move it as well.
Apart from these (and the base address was already #defined),
the table is very uniform.
Change-Id: I848a2e2b0b16021c7ee5ba99097fa6a5886c3286
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/1562
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
Diffstat (limited to 'src/southbridge/intel/bd82x6x')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/Kconfig | 4 | ||||
| -rw-r--r-- | src/southbridge/intel/bd82x6x/pch.h | 1 |
2 files changed, 4 insertions, 1 deletions
diff --git a/src/southbridge/intel/bd82x6x/Kconfig b/src/southbridge/intel/bd82x6x/Kconfig index a7d41dcb84..75858c2a67 100644 --- a/src/southbridge/intel/bd82x6x/Kconfig +++ b/src/southbridge/intel/bd82x6x/Kconfig @@ -55,4 +55,8 @@ config SERIRQ_CONTINUOUS_MODE If you set this option to y, the serial IRQ machine will be operated in continuous mode. +config HPET_MIN_TICKS + hex + default 0x80 + endif diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h index 7e67e3bbe6..c9044ed1d3 100644 --- a/src/southbridge/intel/bd82x6x/pch.h +++ b/src/southbridge/intel/bd82x6x/pch.h @@ -47,7 +47,6 @@ #define DEFAULT_GPIOBASE 0x0480 #define DEFAULT_PMBASE 0x0500 -#define HPET_ADDR 0xfed00000 #define DEFAULT_RCBA 0xfed1c000 #ifndef __ACPI__ |