summaryrefslogtreecommitdiff
path: root/src/southbridge/intel/bd82x6x
diff options
context:
space:
mode:
authorKyösti Mälkki <kyosti.malkki@gmail.com>2023-04-08 09:43:56 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2023-04-26 11:03:13 +0000
commit81dc352032cacb309ed9335f394969d847820511 (patch)
treeaab56a7a8917ccab831a6eb7400ffa6b645bf323 /src/southbridge/intel/bd82x6x
parent7f8e2a6a4a9cb1544ef8fa19850abeb3d4213931 (diff)
intel/bd82x6x,broadwell,lynxpoint: Use ACPI_COMMON_MADT_IOAPIC
Change IRQ #0 to GSI #2 override to positive edge trigger from the bus ISA default (positive edge). Change-Id: Iab3d38da9610ede1d338440b4a8ec0f1537c17e6 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74350 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/southbridge/intel/bd82x6x')
-rw-r--r--src/southbridge/intel/bd82x6x/Kconfig2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/bd82x6x/Kconfig b/src/southbridge/intel/bd82x6x/Kconfig
index a0d8605e87..5ba913dac5 100644
--- a/src/southbridge/intel/bd82x6x/Kconfig
+++ b/src/southbridge/intel/bd82x6x/Kconfig
@@ -10,6 +10,7 @@ if SOUTHBRIDGE_INTEL_BD82X6X || SOUTHBRIDGE_INTEL_C216
config SOUTH_BRIDGE_OPTIONS
def_bool y
+ select ACPI_COMMON_MADT_IOAPIC
select ACPI_COMMON_MADT_LAPIC
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
select ACPI_SOC_NVS
@@ -34,7 +35,6 @@ config SOUTH_BRIDGE_OPTIONS
select RTC
select HAVE_INTEL_CHIPSET_LOCKDOWN
select SOUTHBRIDGE_INTEL_COMMON_SMM
- select SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT
select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG
select SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG
select TCO_SPACE_NOT_YET_SPLIT