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authorMatt DeVillier <matt.devillier@gmail.com>2022-03-28 22:40:47 -0500
committerFelix Held <felix-coreboot@felixheld.de>2022-12-21 13:40:31 +0000
commit34ffa64ba8993b167ff3723a5aa86588b9a8e8ba (patch)
treeb21a3e0e51951bd05a842f6fb39a7d89e68ba6c0 /src/southbridge/intel/bd82x6x
parent53bf72b131d68216b589306ab68b787a6de4c18c (diff)
mb/google/octopus: Implement touchscreen/digitizer power sequencing
For octopus variants with a touchscreen/digitizer, drive the enable and reset GPIOs high in romstage, then disable the reset GPIOs in ramstage. Where available, only set the GPIOs for SKUs which have a touchscreen. This will allow coreboot to detect the presence of i2c touchscreens during ACPI SSDT generation (implemented in a subsequent commit). TEST=tested with rest of patch train Change-Id: Ia725b4054069c0a4f60afd7e0bca6e2fd5fdcbba Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63212 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/bd82x6x')
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