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authorAaron Durbin <adurbin@chromium.org>2020-08-17 09:37:13 -0600
committerAaron Durbin <adurbin@chromium.org>2020-08-18 15:57:40 +0000
commitaa902036d0cc8dd48a36fd7cf5fd8e22930b7afd (patch)
tree7166ac3a7f6aa8e2a56e97cca9e73e78859adeee /src/southbridge/intel/bd82x6x
parent819d676fed535c80d68247ed938a6559ff1c7d10 (diff)
elog: rename ELOG_WAKE_SOURCE_GPIO to ELOG_WAKE_SOURCE_GPE
The wake source macro for GPE events was using 'GPIO'. However, current usage is really all GPEs. Therefore, provide clarity in the naming in order to allow for proper GPIO wake events that are separate from the ACPI GPE block. BUG=b:159947207 Change-Id: I27d0ab439c58b1658ed39158eddb1213c24d328f Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44527 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/southbridge/intel/bd82x6x')
-rw-r--r--src/southbridge/intel/bd82x6x/elog.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/bd82x6x/elog.c b/src/southbridge/intel/bd82x6x/elog.c
index c130958191..684f830a9b 100644
--- a/src/southbridge/intel/bd82x6x/elog.c
+++ b/src/southbridge/intel/bd82x6x/elog.c
@@ -87,7 +87,7 @@ void pch_log_state(void)
/* GPIO 0-15 */
for (i = 0; i < 16; i++) {
if ((gpe0_sts & (1 << (16+i))) && (gpe0_en & (1 << (16+i))))
- elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, i);
+ elog_add_event_wake(ELOG_WAKE_SOURCE_GPE, i);
}
/* SMBUS Wake */