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| author | Frans Hendriks <fhendriks@eltan.com> | 2019-04-29 13:29:36 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-05-06 10:26:50 +0000 |
| commit | 683e77e479d7204bdfaf4d9b468901aafe5225e3 (patch) | |
| tree | 2a8a020fcd2d6405b5ca0761c3c46fc831dcd57a /src/southbridge/intel/bd82x6x/sata.c | |
| parent | 85b2ed5438d5d42d00519114e385bf3ae2d56e8f (diff) | |
drivers/intel/fsp1_1/cache_as_ram.inc: Reduce max line length to 80
Cosmetic change to reduce line length to 80 max.
BUG=NA
TEST=Build Portwell PQ7-M107
Change-Id: Ib537592c0a6a3fffc85622e6b74ad5ec8041e7dc
Signed-off-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32509
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/sata.c')
0 files changed, 0 insertions, 0 deletions