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authorMatt DeVillier <matt.devillier@puri.sm>2020-10-29 20:37:56 -0500
committerAngel Pons <th3fanbus@gmail.com>2020-11-03 19:03:54 +0000
commitbf355e7159b3c812f748e366fdffdf0eade77e9d (patch)
treefd4ea219bfc4808fe6baa1574a9cd23c9f23b436 /src/southbridge/intel/bd82x6x/sata.c
parent54e0fd21b1f916a3f152114027db1029a921fc55 (diff)
mb/purism/librem_cnl: Adjust in preparation for new variants
- Move the SoC select to board config (vs baseboard config) - Qualify the VGA PCI ID and CBFS size values based on board selection - Move devicetree to variant dir and add Kconfig entry - Use a separate board_info.txt for the baseboard and each variant Change-Id: I4764f2c1243ea49bd08e0735865cc3cb7a66441f Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47051 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/sata.c')
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