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authorDuncan Laurie <dlaurie@chromium.org>2012-07-16 16:16:31 -0700
committerRonald G. Minnich <rminnich@gmail.com>2012-07-26 20:29:16 +0200
commitcfb64bda83f5f47762845b8b6666783bae82ec34 (patch)
treedfd8883996fa9933ba50226eb57df9bd11cc4ab2 /src/southbridge/intel/bd82x6x/sata.c
parent0920915bca2391ed318eeb12ddad8b7cb4a52905 (diff)
SATA: Add option to configure gen3 transmitter
Unfortunately the drive strength values are very much board specific and different between mobile and desktop so we don't try to do any fancy detection here but let it be specified directly in the devicetree. Change-Id: I66674bff0de04ecd088fb09afad1cf801a374df2 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: http://review.coreboot.org/1347 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/sata.c')
-rw-r--r--src/southbridge/intel/bd82x6x/sata.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/src/southbridge/intel/bd82x6x/sata.c b/src/southbridge/intel/bd82x6x/sata.c
index c0eb23249d..2e4115882b 100644
--- a/src/southbridge/intel/bd82x6x/sata.c
+++ b/src/southbridge/intel/bd82x6x/sata.c
@@ -182,6 +182,15 @@ static void sata_init(struct device *dev)
pci_write_config32(dev, 0x94,
((config->sata_port_map ^ 0x3f) << 24) | 0x183);
}
+
+ /* Set Gen3 Transmitter settings if needed */
+ if (config->sata_port0_gen3_tx)
+ pch_iobp_update(SATA_IOBP_SP0G3IR, 0,
+ config->sata_port0_gen3_tx);
+
+ if (config->sata_port1_gen3_tx)
+ pch_iobp_update(SATA_IOBP_SP1G3IR, 0,
+ config->sata_port1_gen3_tx);
}
static void sata_enable(device_t dev)