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| author | Arthur Heymans <arthur@aheymans.xyz> | 2018-04-11 13:03:34 +0200 |
|---|---|---|
| committer | Arthur Heymans <arthur@aheymans.xyz> | 2018-04-11 11:49:05 +0000 |
| commit | 68f688896ce347f7304748b655332354dc1da778 (patch) | |
| tree | aad6838527a06637a78268cd3d09f9b00609b68f /src/southbridge/intel/bd82x6x/pch.h | |
| parent | 5fbe788bae15f0d24d56011e8eb8b48c107b7b05 (diff) | |
Revert "model_206ax: Use parallel MP init"
This reverts commit 5fbe788bae15f0d24d56011e8eb8b48c107b7b05.
This commit was submitted without its parent being submitted,
resulting in coreboot not building.
Change-Id: I87497093ccf6909b88e3a40d5f472afeb7f2c552
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/25616
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/pch.h')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/pch.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h index 9e87ff6b72..ebcb058c0b 100644 --- a/src/southbridge/intel/bd82x6x/pch.h +++ b/src/southbridge/intel/bd82x6x/pch.h @@ -68,6 +68,9 @@ int pch_silicon_revision(void); int pch_silicon_type(void); int pch_silicon_supported(int type, int rev); void pch_iobp_update(u32 address, u32 andvalue, u32 orvalue); +#if IS_ENABLED(CONFIG_ELOG) +void pch_log_state(void); +#endif #else /* __PRE_RAM__ */ void enable_smbus(void); void enable_usb_bar(void); |