diff options
| author | Marc Jones <marc.jones@se-eng.com> | 2013-02-11 14:36:35 -0700 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-03-17 22:49:01 +0100 |
| commit | 783f226208f0d25cc25ff3a9d56e108a09fb4cff (patch) | |
| tree | a4c9d8a30b82fcb5ebbcb845758735127e08b768 /src/southbridge/intel/bd82x6x/pch.h | |
| parent | e6c3b1d30d3fa88af6da6fcc115aa6cba3c55d1c (diff) | |
Add bd82x6x PCH functions to SMM
Add the PCH function to SMM for follow-on SMM patches that
require these functions.
Change-Id: I7f3a512c5e98446e835b59934d63a99e8af15280
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/2758
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/pch.h')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/pch.h | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h index ca54418914..7f64571c4b 100644 --- a/src/southbridge/intel/bd82x6x/pch.h +++ b/src/southbridge/intel/bd82x6x/pch.h @@ -57,17 +57,19 @@ void intel_pch_finalize_smm(void); #endif #if !defined(__ASSEMBLER__) && !defined(__ROMCC__) -#if !defined(__PRE_RAM__) && !defined(__SMM__) +#if !defined(__PRE_RAM__) +#if !defined(__SMM__) #include "chip.h" +void pch_enable(device_t dev); +#endif int pch_silicon_revision(void); int pch_silicon_type(void); int pch_silicon_supported(int type, int rev); -void pch_enable(device_t dev); void pch_iobp_update(u32 address, u32 andvalue, u32 orvalue); #if CONFIG_ELOG void pch_log_state(void); #endif -#else +#else /* __PRE_RAM__ */ void enable_smbus(void); void enable_usb_bar(void); int smbus_read_byte(unsigned device, unsigned address); |