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authorVladimir Serbinenko <phcoder@gmail.com>2014-05-18 11:05:56 +0200
committerVladimir Serbinenko <phcoder@gmail.com>2014-07-29 00:52:28 +0200
commit7686a56574a6773717b49a51786f301970d1c69c (patch)
tree40dcb474d1d0c88095e45c37044e25df5b6e2f20 /src/southbridge/intel/bd82x6x/pch.h
parentb37ee1ee7c69836cfb333c13f787a1c3ba580b8f (diff)
sandy/ivybridge: Native raminit.
Based on damo22's work and my X230 tracing. Works for my X230 in a variety of RAM configs. Also-By: Damien Zammit <damien@zamaudio.com> Change-Id: I1aa024c55a8416fc53b25e7123037df0e55a2769 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Signed-off-by: Damien Zammit <damien@zamaudio.com> Reviewed-on: http://review.coreboot.org/5786 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/pch.h')
-rw-r--r--src/southbridge/intel/bd82x6x/pch.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h
index 90de85566f..83128e2540 100644
--- a/src/southbridge/intel/bd82x6x/pch.h
+++ b/src/southbridge/intel/bd82x6x/pch.h
@@ -74,6 +74,8 @@ void enable_smbus(void);
void enable_usb_bar(void);
int smbus_read_byte(unsigned device, unsigned address);
int early_spi_read(u32 offset, u32 size, u8 *buffer);
+void early_thermal_init(void);
+void early_pch_init_native(void);
#endif
#endif