diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-18 16:33:39 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-21 07:00:45 +0000 |
| commit | 12b121cdb450d96309dd96b2ccc25fc5501d2250 (patch) | |
| tree | 1d94c123c23512b811d69d9876ac9a860bbbe0f6 /src/southbridge/intel/bd82x6x/pch.h | |
| parent | 544b572c07bb09aba36705b5d8ffca3b793323f6 (diff) | |
southbridge/intel: Tidy up preprocessor and headers
Change-Id: I52a7b39566acd64ac21a345046675e05649a40f5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34980
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/pch.h')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/pch.h | 20 |
1 files changed, 8 insertions, 12 deletions
diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h index bc6c8b333f..fcb15ac99e 100644 --- a/src/southbridge/intel/bd82x6x/pch.h +++ b/src/southbridge/intel/bd82x6x/pch.h @@ -56,20 +56,19 @@ #ifndef __ACPI__ #define DEBUG_PERIODIC_SMIS 0 -#if !defined(__ASSEMBLER__) -#if !defined(__PRE_RAM__) -#if !defined(__SIMPLE_DEVICE__) -#include "chip.h" -void pch_enable(struct device *dev); -#endif + int pch_silicon_revision(void); int pch_silicon_type(void); int pch_silicon_supported(int type, int rev); void pch_iobp_update(u32 address, u32 andvalue, u32 orvalue); -#else /* __PRE_RAM__ */ + void enable_smbus(void); void enable_usb_bar(void); + +#if ENV_ROMSTAGE int smbus_read_byte(unsigned device, unsigned address); +#endif + void early_thermal_init(void); void southbridge_configure_default_intmap(void); void southbridge_rcba_config(void); @@ -87,14 +86,11 @@ struct southbridge_usb_port }; #ifndef __ROMCC__ +void pch_enable(struct device *dev); extern const struct southbridge_usb_port mainboard_usb_ports[14]; #endif -void -early_usb_init (const struct southbridge_usb_port *portmap); - -#endif -#endif +void early_usb_init(const struct southbridge_usb_port *portmap); /* PM I/O Space */ #define UPRWC 0x3c |