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authorKyösti Mälkki <kyosti.malkki@gmail.com>2020-01-06 19:00:31 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2020-01-09 21:31:31 +0000
commit73451fdea266e24a3ce99e1bf41f49735dc62d28 (patch)
tree96b29d28afcfc25e7cedf4e410a56df049248ce4 /src/southbridge/intel/bd82x6x/pch.h
parent7cdcc38f292d7a8ffd285d17c848e60e41eec759 (diff)
sb/intel/common: Add smbus_set_slave_addr()
Change-Id: I7dddb61fab00e0f4f67d4eebee0cfe8dcd99f4ab Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38230 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/pch.h')
-rw-r--r--src/southbridge/intel/bd82x6x/pch.h1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h
index 089d4586bf..5f353af1ee 100644
--- a/src/southbridge/intel/bd82x6x/pch.h
+++ b/src/southbridge/intel/bd82x6x/pch.h
@@ -238,7 +238,6 @@ void early_usb_init(const struct southbridge_usb_port *portmap);
#define PCH_SMBUS_DEV PCI_DEV(0, 0x1f, 3)
#define SMB_BASE 0x20
#define HOSTC 0x40
-#define SMB_RCV_SLVA 0x09
/* HOSTC bits */
#define I2C_EN (1 << 2)