summaryrefslogtreecommitdiff
path: root/src/southbridge/intel/bd82x6x/lpc.c
diff options
context:
space:
mode:
authorKyösti Mälkki <kyosti.malkki@gmail.com>2020-06-29 05:57:12 +0300
committerPatrick Georgi <pgeorgi@google.com>2021-01-04 23:15:46 +0000
commit8c2cc68b1ac9e1fb2011bcb669df04b4c8cad351 (patch)
treed58be6725fbfc4c15034a630afdb8262e2fca84e /src/southbridge/intel/bd82x6x/lpc.c
parentc5a3a4a602f938dbc6e2e63c96522e0b74b6c814 (diff)
arch/x86: Pass GNVS as parameter to SMM module
Change-Id: I9d7417462830443f9c96273d2cc326cbcc3b17dd Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48698 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/lpc.c')
-rw-r--r--src/southbridge/intel/bd82x6x/lpc.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c
index 8af80654e9..4515261ad2 100644
--- a/src/southbridge/intel/bd82x6x/lpc.c
+++ b/src/southbridge/intel/bd82x6x/lpc.c
@@ -659,8 +659,6 @@ void southbridge_inject_dsdt(const struct device *dev)
chromeos_init_chromeos_acpi(&(gnvs->chromeos));
#endif
- /* And tell SMI about it */
- apm_control(APM_CNT_GNVS_UPDATE);
/* Add it to DSDT. */
acpigen_write_scope("\\");