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| author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2024-04-03 09:32:29 +0200 |
|---|---|---|
| committer | Lean Sheng Tan <sheng.tan@9elements.com> | 2024-04-14 20:48:58 +0000 |
| commit | e2271dc0de7e3ad299ade88d214e377a91ab0bc3 (patch) | |
| tree | 03d0734a6aa0d260c5ef7a2db3be3eb52c40ee22 /src/southbridge/intel/bd82x6x/include | |
| parent | b61738ce7663170f2f22d02ba087616b318a1ea8 (diff) | |
soc/intel/xeon_sp: Compress FSP-S
Compress FSP-S to save some space in CBFS.
Reduces the size of debug FSP-S by about 25%.
Test: Still boots on ibm/sbp1.
TEST= Build and boot on intel/archercity CRB.
Change-Id: I6248e7cabbce45f6c2fedfab34f328309f87e868
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81634
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/include')
0 files changed, 0 insertions, 0 deletions