diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2020-06-07 22:09:01 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-06-10 18:48:32 +0000 |
| commit | c803f65206188ca74526054c54bce4f405a55850 (patch) | |
| tree | 9ce8dd5df1ac5e56912bb0f72c19274bfcfd0acb /src/southbridge/intel/bd82x6x/early_me.c | |
| parent | 7333ea91eae33a874cf5187bc04906f6d2f1e3bf (diff) | |
sb/intel/bd82x6x: Use PCI bitwise ops
Some cases could not be factored out while keeping reproducibility.
Also mark some potential bugs with a FIXME comment, since fixing them
while also keeping the binary unchanged is pretty much impossible.
Tested with BUILD_TIMELESS=1, Asus P8Z77-V LX2 does not change.
Change-Id: Iafe62d952a146bf53a28a1a83b87a3ae31f46720
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42152
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/early_me.c')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/early_me.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/src/southbridge/intel/bd82x6x/early_me.c b/src/southbridge/intel/bd82x6x/early_me.c index 83639a46d3..1d132ee7ea 100644 --- a/src/southbridge/intel/bd82x6x/early_me.c +++ b/src/southbridge/intel/bd82x6x/early_me.c @@ -110,7 +110,6 @@ static inline void set_global_reset(int enable) int intel_early_me_init_done(u8 status) { u8 reset, errorcode, opmode; - u16 reg16; u32 mebase_l, mebase_h; u32 millisec; u32 hfs, me_fws2; @@ -163,8 +162,7 @@ int intel_early_me_init_done(u8 status) } else if ((me_fws2 & 0x100) == 0x100) { if ((me_fws2 & 0x80) == 0x80) { printk(BIOS_NOTICE, "CPU was replaced & warm reset required...\n"); - reg16 = pci_read_config16(PCI_DEV(0, 31, 0), 0xa2) & ~0x80; - pci_write_config16(PCI_DEV(0, 31, 0), 0xa2, reg16); + pci_and_config16(PCI_DEV(0, 31, 0), 0xa2, ~0x80); set_global_reset(0); system_reset(); } |