sb/intel/bd82x6x: Let mainboard override SPI opmenu

For some SPI chips (e.g. those with AAI writes), the default OPMENU
definitions don't work well. Thus, provide an option to override the
defaults in the devicetree.

Writing the OPMENU now happens in ramstage instead of the SMM finalize
handler. If you let coreboot call the finalize handler, nothing should
change. If you call the handler from your payload, OTOH, the OPMENU
might have been changed in between, so be careful what you lock.

Change-Id: I9ceaf5b2d11365e21a2bebc9c5def1fcf0be8aad
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/23587
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nicola Corna <nicola@corna.info>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>

1 files changed, 8 insertions, 0 deletions

diff --git a/src/southbridge/intel/bd82x6x/chip.h b/src/southbridge/intel/bd82x6x/chip.h
index e1064a721f..ce8a804d50 100644
--- a/src/southbridge/intel/bd82x6x/chip.h
+++ b/src/southbridge/intel/bd82x6x/chip.h
@@ -95,6 +95,14 @@ struct southbridge_intel_bd82x6x_config {
 
 	uint32_t spi_uvscc;
 	uint32_t spi_lvscc;
+	struct {
+		uint8_t opprefixes[2];
+		struct {
+			uint8_t needs_address;
+			uint8_t is_write;
+			uint8_t op;
+		} ops[8];
+	} spi;
 };
 
 #endif				/* SOUTHBRIDGE_INTEL_BD82X6X_CHIP_H */