diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-07-08 09:22:13 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2020-12-03 00:05:52 +0000 |
| commit | 48a6c018bcb8a182c4934d2788567e512d490f96 (patch) | |
| tree | 59ecbc8962d7fa937ae8ebff140e8df970267d5f /src/southbridge/intel/bd82x6x/acpi | |
| parent | d477565dbd6e9b6467f49c84a4f05047ffa22682 (diff) | |
src: Remove redundant use of ACPI offset(0)
IASL version 20180927 and greater, detects Unnecessary/redundant uses of
the Offset() operator within a Field Unit list.
It then sends a remark "^ Unnecessary/redundant use of Offset"
example:
OperationRegion (OPR1, SystemMemory, 0x100, 0x100)
Field (OPR1)
{
Offset (0), // Never needed
FLD1, 32,
Offset (4), // Redundant, offset is already 4 (bytes)
FLD2, 8,
Offset (64), // OK use of Offset.
FLD3, 16,
}
We will have those remarks:
dsdt.asl 14: Offset (0),
Remark 2158 - ^ Unnecessary/redundant use of Offset operator
dsdt.asl 16: Offset (4),
Remark 2158 - ^ Unnecessary/redundant use of Offset operator
Change-Id: I260a79ef77025b4befbccc21f5999f89d90c1154
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43283
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/acpi')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/acpi/globalnvs.asl | 1 | ||||
| -rw-r--r-- | src/southbridge/intel/bd82x6x/acpi/pch.asl | 3 |
2 files changed, 1 insertions, 3 deletions
diff --git a/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl b/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl index f9944720a8..46096cc66b 100644 --- a/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl +++ b/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl @@ -15,7 +15,6 @@ OperationRegion (GNVS, SystemMemory, NVSA, 0xf00) Field (GNVS, ByteAcc, NoLock, Preserve) { /* Miscellaneous */ - Offset (0x00), OSYS, 16, // 0x00 - Operating System SMIF, 8, // 0x02 - SMI function PRM0, 8, // 0x03 - SMI function parameter diff --git a/src/southbridge/intel/bd82x6x/acpi/pch.asl b/src/southbridge/intel/bd82x6x/acpi/pch.asl index 4f08a64e8a..4a033abfb1 100644 --- a/src/southbridge/intel/bd82x6x/acpi/pch.asl +++ b/src/southbridge/intel/bd82x6x/acpi/pch.asl @@ -63,8 +63,7 @@ Scope(\) OperationRegion(GPIO, SystemIO, DEFAULT_GPIOBASE, 0x6c) Field(GPIO, ByteAcc, NoLock, Preserve) { - Offset(0x00), // GPIO Use Select - GU00, 8, + GU00, 8, // GPIO Use Select GU01, 8, GU02, 8, GU03, 8, |