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author | Aaron Durbin <adurbin@chromium.org> | 2012-10-31 22:39:06 -0500 |
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committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-11-12 18:38:36 +0100 |
commit | 6866c08129b20504cd66f88afb232073249c8725 (patch) | |
tree | fc3ca10b5197f93400fd463062a63904e3eb6ecb /src/southbridge/intel/bd82x6x/Makefile.inc | |
parent | 632175802e3d6c3265aa6f511a5aa400d00953d1 (diff) |
mmio pci config: Remove register constraints
The currently encoded register constraints fails compilation
for SMM code or any code that compiles with -fPIC. The reason
is that the ebx register is used for GOT base register.
I don't believe the comment eluding to register constraints for AMD
processors still applies. Therefore remove mmio_conf.h, and use the
mmio methods in io.h.
Change-Id: I391e5c2088ebc760b3a6ed6c37b65bbecab40a5c
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/1801
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/Makefile.inc')
0 files changed, 0 insertions, 0 deletions